PISC – A Minimal TTL Processor for Architecture Exploration.

PISC – Pathetic Instruction Set Computer

Some time back now (nearly two years if recollection serves) I was web surfing for information regarding that most arcane of computer programming languages “Forth”. As so often happens when Surfing, I stumbled across something only loosely related but of particular interest – to me at least.

A paper by Bradford J. Rodriguez entitled “A Minimal TTL Processor for Architecture Exploration”. This was a design for a complete computer. Albeit with limited capabilities, built from approximately 20 odd TTL chips – but with NO conventional microprocessor or CPU. The TTL chips themselves serve to create the actual CPU.

Having built several home brew kit computers mostly with Zilog Z80 CPU’s. This paper fascinated me. The target audience were clearly intended to be educators in the Computer Science. But while the paper was very concise it was accompanied with a set of three beautifully presented circuit diagrams. So I read and re-read the paper while studying the circuits and eventually the whole picture started to make sense. I thought that I could probably build this.

Small problem. Two primary key ingredients in the form of the Arithmetic Logic Units (ALU) chips used 74181 and the Register File chip, the 74172 were both now so extinct as to be classified as “unobtainium”. Undeterred I went looking for a source for both anyway. To my surprise I found it wasn’t that hard. Perhaps I got lucky as one of my preferred Electrical Parts re-cycler’s here in Australia miraculously had enough stock of both these chips to commence construction.

So we set about building PISC. The “Pathetic Instruction Set Computer”.

Much more information coming soon. For now however I’ll sign-off with these three links to some Vimeo videos I created showing PISC at various stages.

PISC running it’s first complex program.

PISC board overview

PISC Monitor Program Demo